Xentium architecture

Xentium processor core block diagram

The Xentium core consists of a datapath, a control part, an instruction cache and a tightly coupled data memory. Common bus interfaces which can be extended with e.g. external Network-on-Chip (NoC) interfaces facilitate integration into a System-on-Chip (SoC).

The Xentium core contains the control, instruction cache, and datapath. The datapath consists of 10 functional units that can operate in parallel. The control supports efficient execution of pipelined loops.

The tightly coupled data memory is organized in parallel memory banks to allow simultaneous access through the internal buses and the external slave interface by different resources.

Optional interfaces enable easy integration of the Xentium processor in, for example, a NoC-based System-on-Chip.